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FPGA Simulation
Active-HDL
Active-HDL™ is a Windows® based, integrated FPGA Design Creation and Simulation solution for team-based environments. Active-HDL’s Integrated Design Environment (IDE) includes a full HDL and graphical design tool suite and RTL/gate-level mixed-language simulator for rapid deployment and verification of FPGA designs.
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RTL Lint Analyzer and Rule Checker
Ascent Lint
Ascent Lint is a state-of-the-art RTL linter and rule checker for full-chip SoC analysis. Designed from the bottom-up to deliver the highest performance, capacity and low-noise reporting, it is the best-in-class HDL linter available today with a comprehensive set of syntax and semantic checks.
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Serial FPDP HDL
Curtiss-Wright Defense Solutions
A serial FPDP HDL is available in-source or ported to specific host platforms under the FusionXF suite. The serial FPDP IP supports data rates of up to 2.5Gbps per channel. The IP is suitable for Xilinx Virtex-5 and Virtex-6 platforms. Contact Curtiss-Wright for alternative platforms. Licensing is on a per-project, per-site basis. License details are available from Curtiss-Wright.
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FlexRIO Adapter Module Development Kit for Modular I/O
780711-01
FlexRIO Adapter Module Development Kit for FlexRIO—The FlexRIO Adapter Module Development Kit (MDK) for Modular I/O enables you to choose the specific converters, buffers, connectors, and other components so that you can build the exact analog and digital I/O you need into a custom adapter module for FlexRIO. NI recommends that you have custom printed circuit board (PCB) design and hardware description language (HDL) code development experience to use the FlexRIO Adapter MDK for Modular I/O.